/*
** ############################################################################
**     Project   : osdee - Operative Systems Design for Embedded Envrionments
**     File      : Os_Isr.h
**     Revision  ; 1.0
**     Abstract  :
**         Interrup configuration functions implementation.
**     Processor : MC9S12XEP100CVL
**     Version   : Component 01.042, Driver 01.05, CPU db: 3.00.036
**     Datasheet : MC9S12XEP100 Rev. 1.19 12/2008
**
**     Copyright : 2014 Fernando Rodriguez, Open source with out any responsability.
**     
**     mail      : frr@gmail.com
** ############################################################################
*/
/** Own headers */
/** Interrupt functions and definitions */
#include    "Os_Isr.h"

/* Enable I-maskable interrupts by clearing the I bit in the CCR */
#define _INTERRUPT_ENABLE()             \
{                                       \
    __asm  CLI;                         \
    XGMCTL_XGIE = 1;                    \
}

/** Disable I-maskable interrupts by setting the I bit in the CCR */
#define _INTERRUPT_DISABLE()            \
{                                       \
    __asm  SEI;                         \
    XGMCTL_XGIE = 0;                    \
}


UINT8 u8DisableIntCount = 0;

void Mcu_vInterrupt_Init( void  )
{

#ifdef __S12_CORE
        /* Intilialize the interupt vector base address for default location */
    IVBR = 0xFFu;
#endif

#ifdef __S08_CORE
#endif
}

void INTERRUPT_ENABLE(void)
{
  if(!--u8DisableIntCount)
  {  
    _INTERRUPT_ENABLE()
  }    
}

void INTERRUPT_DISABLE(void)
{
  u8DisableIntCount++;
  _INTERRUPT_DISABLE()
}


